Novel FPGA based Haar classifier face detection algorithm acceleration

  title={Novel FPGA based Haar classifier face detection algorithm acceleration},
  author={Changjian Gao and Shih-Lien Lu},
  journal={2008 International Conference on Field Programmable Logic and Applications},
We present here a novel approach to use FPGA to accelerate the Haar-classifier based face detection algorithm. With highly pipelined microarchitecture and utilizing abundant parallel arithmetic units in the FPGA, wepsilave achieved real-time performance of face detection having very high detection rate and low false positives. Moreover, our approach is flexible toward the resources available on the FPGA chip. This work also provides us an understanding toward using FPGA for implementing non… CONTINUE READING
Highly Cited
This paper has 79 citations. REVIEW CITATIONS
51 Citations
21 References
Similar Papers


Publications citing this paper.
Showing 1-10 of 51 extracted citations

80 Citations

Citations per Year
Semantic Scholar estimates that this publication has 80 citations based on the available data.

See our FAQ for additional information.


Publications referenced by this paper.
Showing 1-10 of 21 references

Frontal Face Images

  • CMU
  • 2008,…
  • 2008
1 Excerpt

Intel Integrated Performance Primitives 5.3

  • Intel
  • 2008,…
  • 2008
2 Excerpts

Open Computer Vision Library

  • Sourceforge
  • 2008,…
  • 2008
2 Excerpts

Similar Papers

Loading similar papers…