Noise optimization of the time and energy measuring ASIC for silicon tracking system

Abstract

This paper presents multi-objective optimization of a front-end electronics implemented in multichannel integrated circuit for silicon sensors readout in the Silicon Tracking System in the CBM experiment at the FAIR center. We present the optimization towards low-power (<; 8 mW/channel) and low-noise while keeping the channel pitch of 58 μm and… (More)
DOI: 10.1109/MIXDES.2015.7208569

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Cite this paper

@article{Kasinski2015NoiseOO, title={Noise optimization of the time and energy measuring ASIC for silicon tracking system}, author={Krzysztof Kasinski and Rafal Kleczek and Robert Szczygiel and Piotr Otfinowski and Pawel Grybos}, journal={2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)}, year={2015}, pages={490-495} }