Noise margin and short-circuit current in FGMOS logics

@article{CisnerosSinencio2011NoiseMA,
  title={Noise margin and short-circuit current in FGMOS logics},
  author={Luis-Fortino Cisneros-Sinencio and Alejandro D{\'i}az-S{\'a}nchez and Jaime Ramx00EDrez-Angulo},
  journal={IEICE Electronic Express},
  year={2011},
  volume={8},
  pages={1967-1971}
}
Even when floating-gate logics are very-low-voltage circuits, as power supply is reduced, large fan-in FGMOS gates are prone to fail. Thus, determining the negative impact of noise margin and short-circuit current in this type of circuits is crucial to achieve optimal operation for a particular application. For this reason, a systematic and reliable technique for obtaining the correlation between fan-in and supply voltage, simultaneously considering noise margin and short-circuit current, is… CONTINUE READING

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