Noise Analysis and Minimization in Bang-Bang Digital PLLs

@article{Zanuso2009NoiseAA,
  title={Noise Analysis and Minimization in Bang-Bang Digital PLLs},
  author={Marco Zanuso and Davide Tasca and Salvatore Levantino and Andrea Donadel and Carlo Samori and Andrea L. Lacaita},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2009},
  volume={56},
  pages={835-839}
}
In digital bang-bang phase-locked loops (BBPLLs), both the hard nonlinearity of the phase detector and the frequency granularity of the digitally controlled oscillator (DCO) can give rise to undesired tones or peaking in the output spectrum. This work derives the maximum ratio between DCO resolution and jitter, which avoids limit cycles, in the case of dominant DCO noise over reference noise. Moreover, the output jitter is expressed in closed form as a function of the loop parameters and… CONTINUE READING
Highly Cited
This paper has 67 citations. REVIEW CITATIONS

Citations

Publications citing this paper.
Showing 1-10 of 53 extracted citations

68 Citations

051015'11'13'15'17
Citations per Year
Semantic Scholar estimates that this publication has 68 citations based on the available data.

See our FAQ for additional information.

References

Publications referenced by this paper.
Showing 1-10 of 10 references

Jitter transfer analysis of tracked oversampling techniques for multigigabit clock and data recovery

  • Y. Choi, D.-K. Jeong, W. Kim
  • IEEE Trans. Circuits Syst. II, Analog Digit…
  • 2003
1 Excerpt

Similar Papers

Loading similar papers…