Nano-bridge enabled three-dimensional gate-all-around field effect transistors

@article{Oh2014NanobridgeET,
  title={Nano-bridge enabled three-dimensional gate-all-around field effect transistors},
  author={Jin Yong Oh and Hyun-June Jang and Won-Ju Cho and Jong-Tae Park and M. Saif Islam},
  journal={8th International Conference on Electrical and Computer Engineering},
  year={2014},
  pages={675-678}
}
We demonstrate the integration of nanowires to design gate-all-around field-effect-transistors (GAA-FETs) in the shape of horizontally aligned 3-dimensional semiconductor nano-bridges. The transistors exhibited a high on/off-current ratio, low sub-threshold swing and very low off-currents. In addition to designing low-voltage non-volatile memory cells, the photosensitivity of the FETs is employed to demonstrate several analog and digital applications such as electro-optical OR gate circuit… CONTINUE READING

Figures from this paper.

References

Publications referenced by this paper.
SHOWING 1-6 OF 6 REFERENCES

A novel interconnection technique for manufacturing nanowire devices,

M. S. Islam, S. Sharma, T. 1. Kamins, R. S. Williams
  • Applied Physics a-Materials Science & Processing,
  • 2005

Programmable nanowire circuits for nanoprocessors Reconfigurable Silicon Nanowire Transistors

R. S. Williams, W. J. Cho

    Structural characteristics and connection mechanism of gold - catalyzed bridging silicon nanowires

    M. S. Islam, R. S. Williams, A. F. Marshall