Multirate Cascaded Discrete-Time Low-Pass ΔΣ Modulator for GSM/Bluetooth/UMTS

Abstract

This paper shows that multirate processing in a cascaded discrete-time ΔΣ modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time ΔΣ modulator by its adaptibility with the sampling frequency. The power reduction can be achieved by relaxing the sampling speed of the first stage and increasing it… (More)
DOI: 10.1109/JSSC.2010.2046240

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