Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth

@article{Pae1999MultipleLO,
  title={Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth},
  author={Sangwoo Pae and Taichi Su and J B Denton and G. W. Neudeck},
  journal={IEEE Electron Device Letters},
  year={1999},
  volume={20},
  pages={194-196}
}
This paper presents for the first time, multiple layers of silicon-on-insulator (MLSOI) device islands fabricated using selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO) techniques. MLSOI has the potential for ultra dense device integration. SOI device islands as small as 150 nm/spl times/150 nm, with thickness down to 40 nm have been fabricated. SOI device islands (5 /spl mu/m/spl times/500 /spl mu/m) in the second layer have shown no stacking faults in the 1290 islands… CONTINUE READING
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Multiple layers of silicon-on-insulator (MLSOI) islands fabrication process and fully depleted SOI pMOSFET’s

  • S. Pae, T. Su, J. P. Denton, G. W. Neudeck, J. C. Stout, D. B. Janes
  • IEEE SOI Conf., 1998, pp. 15–16.
  • 1998
1 Excerpt

Fabrication of ultrathin, highly uniform thin-film SOI MOSFET’s with low series resistance using pattern-constrained epitaxy

  • H. S. Wong, K. K. Chan, Y. Lee, P. Roper, Y. Taur
  • IEEE Trans. Electron Devices, vol. 44, pp. 1131…
  • 1997
1 Excerpt

Stacking fault reduction in silicon-on-insulator (SOI) islands produced by selective epitaxial growth (SEG) of silicon using a thermally nitrided SiO2 field insulator

  • G. W. Neudeck, K. D. Merritt, J. P. Denton
  • Microelectron. Eng., vol. 36, pp. 391–394, July…
  • 1997
2 Excerpts

The potential of ultrathin-film SOI devices for low-power and high-speed applications

  • Y. Kado
  • IEICE Trans. Electron., vol. E80-C, no. 3, pp…
  • 1997
1 Excerpt

A comparative study of advanced MOSFET concepts

  • C. H. Wann, K. Noda, T. Tanaka, M. Yoshida, C. Hu
  • IEEE Trans. Electron Devices, vol. 43, pp. 1742…
  • 1996

Gigascale integration: Is the sky the limit

  • J. Meindl
  • IEEE Circuits Devices Mag., pp. 19–32, Nov. 1996.
  • 1996
1 Excerpt

Three-dimensional IC’s, having four stacked active device layers

  • T. Kunio, K. Oyama, Y. Hayashi, M. Morimoto
  • IEDM Tech. Dig., 1989, pp. 837–840.
  • 1989
1 Excerpt

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