Multi-patch generation for multi-error logic rectification by interpolation with cofactor reduction

@article{Tang2012MultipatchGF,
  title={Multi-patch generation for multi-error logic rectification by interpolation with cofactor reduction},
  author={Kai-Fu Tang and Po-Kai Huang and Chun-Nan Chou and Chung-Yang Huang},
  journal={2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)},
  year={2012},
  pages={1567-1572}
}
For a design with multiple functional errors, multiple patches are usually needed to correct the design. Previous works on logic rectification are limited to either single-fix or partial-fix rectifications. In other words, only one or part of the erroneous behaviors can be fixed in one iteration. As a result, it may lead to unnecessarily large patches or even failure in rectification. In this paper, we propose a multi-patch generation technique by interpolation with cofactor reduction. In… CONTINUE READING

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