Multi-Mode Unrolled Architectures for Polar Decoders

@article{Giard2015MultiModeUA,
  title={Multi-Mode Unrolled Architectures for Polar Decoders},
  author={Pascal Giard and Gabi Sarkis and Claude Thibeault and Warren J. Gross},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  year={2015},
  volume={63},
  pages={1443-1453}
}
  • P. GiardG. Sarkis W. Gross
  • Published 6 May 2015
  • Computer Science
  • IEEE Transactions on Circuits and Systems I: Regular Papers
In this work, we present a family of architectures for polar decoders using a reduced-complexity successive-cancellation decoding algorithm that employs unrolling to achieve extremely high throughput values while retaining moderate implementation complexity. The resulting fully-unrolled, deeply-pipelined architecture is capable of achieving a coded throughput in excess of 1 Tbps on a 65 nm ASIC at 500 MHz-three orders of magnitude greater than current state-of-the-art polar decoders. However… 

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