Modified booth truncated multipliers

@inproceedings{Katkar2004ModifiedBT,
  title={Modified booth truncated multipliers},
  author={Alok A. Katkar and James E. Stine},
  booktitle={ACM Great Lakes Symposium on VLSI},
  year={2004}
}
Truncated multiplication provides an efficient method for reducing the power dissipation and area of rounded parallel multipliers in digital signal processing systems. With this technique, the products of parallel multipliers are rounded to a shorter word size and the least-significant columns of the multiplication matrix are not used. This technique provides significant savings in terms of power dissipation for unsigned multiplication. Although previous implementations involved unsigned and… CONTINUE READING

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