# Modified Montgomery modular multiplication and RSA exponentiation techniques

@inproceedings{McIvor2004ModifiedMM, title={Modified Montgomery modular multiplication and RSA exponentiation techniques}, author={Ciaran McIvor and M{\'a}ire McLoone and John V. McCanny}, year={2004} }

Modified Montgomery multiplication and associated RSA modular exponentiation algorithms and circuit architectures are presented. These modified multipliers use carry save adders (CSAs) to perform large word length additions. These have the attraction that, when repeatedly used to perform RSA modular exponentiation, the (carry save) format of the output words is compatible with that required by the multiplier inputs. This avoids the repeated interim output/input format conversion, needed when…

## 182 Citations

A New Montgomery Modular Multiplication Algorithm and its VLSI Design for RSA Cryptosystem

- Mathematics, Computer Science2007 IEEE International Symposium on Circuits and Systems
- 2007

A unified Montgomery modular multiplication algorithm that can be applied to fulfil either the conventional modular multiplication or squaring operation in carry-save form so as to achieve area-efficient design of modular exponentiation is proposed.

An Optimized Montgomery Modular Multiplication Algorithm for Cryptography

- 2013

Montgomery modular multiplication is one of the fundamental operations used in cryptographic algorithms, such as RSA and Elliptic Curve Cryptosystems. The previous Montgomery multipliers perform a…

Modular Multiplication and Exponentiation Architectures for Fast RSA Cryptosystem Based on Digit Serial Computation

- Mathematics, Computer ScienceIEEE Transactions on Industrial Electronics
- 2011

Experimental results show that the proposed modular exponentiation and modular-multiplication design obtain the best delay performance compared with the published works and outperform them in terms of area-time complexity as well.

New and Improved Architectures for Montgomery Modular Multiplication

- Computer ScienceMob. Networks Appl.
- 2007

An improved Montgomery multiplier, based on modified four-to-two carry-save adders (CSAs) to reduce critical path delay, is presented and a new bit-sliced, unified and scalable Montgomery multiplier architecture, applicable for both RSA and ECC, is proposed.

A New Modular Exponentiation Architecture for Efficient Design of RSA Cryptosystem

- Mathematics, Computer ScienceIEEE Transactions on Very Large Scale Integration (VLSI) Systems
- 2008

This paper presents a new modular exponentiation architecture with a unified modular multiplication/square module and shows how to reduce the number of input operands for the CSA tree by mathematical manipulation and shows that the developed architecture obtains the least hardware complexity compared with the existing work.

RSA Cryptosystem with Modified Montgomery Modular Multiplier

- Computer Science2017 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC)
- 2017

The proposed Montgomery modular multiplier has the capability to provide 26% average reduction in power when compared with previous designs and has been proposed to reduce the power consumption of CCSA.

Pipelined VLSI Architecture for RSA Based on Montgomery Modular Multiplication

- 2016

Modular multiplication forms a key operation in many public key cryptosystems. Montgomery Multiplication is one of the wellknown algorithms to carry out the modular multiplication more quickly. Carry…

An RNS Based Montgomery Modular Multiplication Algorithm For Cryptography

- 2017

Montgomery modular multiplication is one of the fundamental operations used in cryptographic algorithms, such as RSA and Elliptic Curve Cryptosystem. The previous Montgomery multipliers perform a…

High-Throughput Modular Multiplication and Exponentiation Algorithms Using Multibit-Scan–Multibit-Shift Technique

- Computer ScienceIEEE Transactions on Very Large Scale Integration (VLSI) Systems
- 2015

A new and efficient Montgomery modular multiplication architecture based on a new digit serial computation that relaxes the high-radix partial multiplication to a binary multiplication and performs several multiplications of consecutive zero bits in one clock cycle instead of several clock cycles is presented.

Efficient FPGA Modular Multiplication and Exponentiation Architectures Using Digit Serial Computation

- Computer Science2010 International Conference on Field Programmable Logic and Applications
- 2010

Experimental results show that the proposed modular exponentiation and modular multiplication design obtains the best delay performance compared with previous published works and outperforms them in terms of area-time complexity.

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