Models of computation for NoC mapping: Timing and energy saving awareness

Abstract

A complex application implemented as a System-on-Chip (SoC) demands extensive system level modeling. Its implementation encompasses a large number of cores and an advanced interconnection scheme such as a Network-on-Chip (NoC). This type of application normally requires energy efficiency and execution time minimization, which implies high-level exploration… (More)
DOI: 10.1016/j.mejo.2016.09.005

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