Models and Algorithms for Statistical Timing and Power Analysis of Digital Integrated Circuits

Abstract

Acknowledgements I am deeply grateful to my advisor, Prof. Michael Orshansky, for his guidance and support throughout these years. I took two courses about CAD/VLSI from Prof. Orshansky in the second year of the Ph.D. program. After that, I joined his research group, and started working on the dissertation. Prof. Orshansky has taught me almost everything about conducting research, and he has always been helpful when I face difficulties. Without his assistance and encouragement, I could not finish this dissertation. I would like to express my gratitude to the members of my dissertation committee, each of whom has given me guidance and important feedback. They are Prof. suggestions make this dissertation better. Besides, I took several courses from Prof. Touba, from which I acquired knowledge about VLSI testing and reliable computing. I benefited from Prof. Shakkottai's probability class which played an important role in my research work. I also thank Prof. Pan's assistance during my PhD study, and appreciate Dr. Liu's feedback on my dissertation, and advice on job hunting and career development. There are several fellow students in the Robust IC Design Laboratory whom I would like to thank for their help. They are Shayak Banerjee. I have benefited greatly from the discussion with them. vi Finally, I am grateful to my family for their continuous support and encouragement. They have always been there when I need help. Without them I could not go abroad to pursue the degree at UT. Last but not least, I appreciate my wife, Ming-Chuan, for her love and support during these years. The increased variability of process and environmental parameters is having a significant impact on timing and power performance metrics of digital integrated circuits. Traditionally formulated deterministic timing and power analysis algorithms based on worst-case values of parameters often lead to over-pessimistic predictions, and may miss actual worst-case performance corners. As a result, there is an increasing need for statistical algorithms that can take into account the probabilistic nature of parameters. The practical applications of statistical approaches, however, are restricted by the limited availability of parameter distributions, and the idealized modeling of parameters adopted in the statistical frameworks. In some cases, only partial probabilistic descriptions of parameters are available, such as the mean and variance. Thus, designers are in an urgent need for statistical approaches that can handle partially-specified uncertainty. The objective of this dissertation is to provide robust and accurate timing …

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@inproceedings{Wang2007ModelsAA, title={Models and Algorithms for Statistical Timing and Power Analysis of Digital Integrated Circuits}, author={Wei-Shen Wang and Nur A. Touba and David Pan and Sanjay Shakkottai and Frank Liu and Michael Orshansky}, year={2007} }