Modeling the effects of patterning error on MOSFET


During IC fabrication, layout shapes do not exactly replicate onto wafers due to distortions in pattern-transfer processes. Conformal mapping is used to give a simple model to estimate the effect of the distortion on the I-V characteristics of MOSFETs. The method is verified by the device simulator DA VINCI. The impact of pattern distortion of MOSFET on… (More)


6 Figures and Tables

Cite this paper

@article{Pun2004ModelingTE, title={Modeling the effects of patterning error on MOSFET}, author={C. H. Pun and P. T. Lai and A K K Wong}, journal={Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004.}, year={2004}, volume={2}, pages={1049-1052 vol.2} }