Modeling of tunneling current and gate dielectric reliability for nonvolatile memory devices

@article{Gehring2004ModelingOT,
  title={Modeling of tunneling current and gate dielectric reliability for nonvolatile memory devices},
  author={A. Gehring and S. Selberherr},
  journal={IEEE Transactions on Device and Materials Reliability},
  year={2004},
  volume={4},
  pages={306-319}
}
  • A. Gehring, S. Selberherr
  • Published 2004
  • Engineering
  • IEEE Transactions on Device and Materials Reliability
  • We present a hierarchy of tunneling models suitable for the two- and three-dimensional simulation of logic and nonvolatile semiconductor memory devices. The crucial modeling topics are comprehensively discussed, namely, the modeling of the energy distribution function in the channel to account for hot-carrier tunneling, the calculation of the transmission coefficient of single and layered dielectrics, the influence of quasi-bound states in the inversion layer, the modeling of static and… CONTINUE READING
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