Modeling of On-Chip Bus Switching Current and Its Impact on Noise in Power Supply Grid

@article{Tuuna2008ModelingOO,
  title={Modeling of On-Chip Bus Switching Current and Its Impact on Noise in Power Supply Grid},
  author={Sampo Tuuna and Li-Rong Zheng and Jouni Isoaho and Hannu Tenhunen},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2008},
  volume={16},
  pages={766-770}
}
In this paper, an analytical model for the current draw of an on-chip bus is presented. The model is combined with an on-chip power supply grid model in order to analyze noise caused by switching buses in a power supply grid. The bus is modeled as distributed resistance-inductance-capacitance (RLC) lines that are capacitively and inductively coupled to each other. Different switching patterns and driver skewing times are also included in the model. The power supply grid is modeled as a network… CONTINUE READING