Modeling, Simulation and Experimental Validation of a DC Power System Testbed


The modeling, simulation and experimental validation of the primary bus components of a dc power system testbed are presented herein. This reduced scale and reduced complexity dc testbed is representative of medium voltage dc (MVDC) systems being considered for shipboard next generation integrated power systems (NGIPS). The primary system components include a 4-pole wound-rotor synchronous generator and a propulsion drive based on an induction machine driven by a fully controlled three-phase bridge inverter with an input filter. Four simulation models are presented: a detailed waveform model, a simplified waveform model, a detailed non-linear average value model, and a simplified non-linear average value model. These models have been implemented in the Advanced Continuous Simulation Language (ACSL). The simplified waveform and average value model (AVM) versions of the ACSL truth models were converted to Simulink to aid dissemination to other researchers. System stability is addressed via time domain simulation and a generalized immittance based stability analysis. The time-domain models and frequency domain stability analysis provide consistent results validated by the experimental results provided herein. 1. TESTBED OVERVIEW The dc testbed reflects the U.S. Navy’s interest in medium voltage dc systems for future ships. This testbed is located at Purdue University and is one of several Office of Naval Research (ONR) sponsored Electric Ship Research and Development Consortium (ESRDC) integrated simulation / stimulation (SIM/STIM) testbeds. Work is also currently underway to establish geographically distributed SIM/STIM capabilities with other ESRDC laboratory facilities. ESRDC is composed of Florida State University, Mississippi State University, MIT, the Naval Postgraduate School, Purdue University, University of South Carolina, University of Texas-Austin and the U.S. Naval Academy. More information about ESRDC can be obtained from and reference [1]. As shown in Figure 1, the dc testbed subset primary bus components included in this study are: 1. Generation system 1 (GS-1) 59 kW wound rotor synchronous machine with Voltage Regulator-1 (VR-1) and passive Rectifier R-1 driven by a fourquadrant dynamometer prime mover emulator. 2. Ship propulsion system (SPS) a 37 kW induction machine (IM) connected to a dynamometer hydrodynamic load emulator. Reports, models, parameter data, simulations and experimental results are available for download at Figure 1 DC testbed primary bus components Three measurements points are indicated: 1. Bus voltage vbus,meas 2. DC current into the SPS idc,meas 3. A-phase current out of the SPS inverter, ias,meas Additional dc testbed components not presented in this study include: 3. Generation system 2 (GS-2) 11 kW permanent magnet synchronous machine with voltage regulator-2 (VR-2) and an inverter serving as rectifier R-2 driven by a four-quadrant dynamometer prime mover emulator. 4. Power supply 1 (PS-1) which steps down the 750 V primary dc bus to the 500 V port-side dc distribution bus. 5. Power supply 2 (PS-2) which feeds the 500 V starboard-side dc distribution fed by a 480 VAC utility grid connection. 6. Three dc distribution zones which include: switchgear, conversion modules, inverter modules and load banks. 7. One pulsed power load (PPL) is designed to place a load on the testbed which is representative of a pulsed power weapon such as a radar or rail gun. Reference [2] provides a comprehensive description of the dc tested including detailed models, parameter values and preliminary test results. The test results included herein supersede the preliminary test results in the reference. The dc testbed is an extension of prior U.S. Navy funded research which included the establishment of a Naval Combat Survivability (NCS) Testbed [3]. The NCS testbed contained an ac primary distribution bus feeding the propulsion load as well as redundant port and starboard dc zonal distribution buses, converters, switchgear and loads. Research under this prior effort included the development of advanced stability analysis tools, power converter control strategies, new time-domain simulation tools, improvement in multi-level power conversion and electric drive propulsion, advanced methods of parameter identification, and investigations into the system effects of pulsed power loading [4]. 2. GENERATOR MODEL As shown in Figure 3, the GS-1 generation system consists of the PM-1 prime mover emulator, a SG-1 synchronous generator, a VR-1 voltage regulator, a R-1 line commutated rectifier, a brushless exciter and an output lowpass filter. The synchronous generator is a 4-pole woundrotor synchronous machine which is rated to supply 59 kW at 1800 rpm. The output of the generator is rectified by a three phase line commutated diode rectifier. The brushless exciter and VR-1 PI voltage regulator provides a 750 V nominal bus voltage. The low-pass LC output filter helps prevent high frequency components, mainly from switching, from propagating on to the dc bus. The one-line diagram of the GS-1 controller is depicted in Figure 2. Therein, * * dc v denotes the reference (or commanded) dc voltage, dc v̂ denotes the low-pass filtered dc bus voltage with filter time constant fv  , and dc î denotes the low-pass filtered inductor current with filter time constant fi  . The reference dc voltage is slew-rate limited to prevent excessive capacitor inrush currents on startup. Short circuit protection is also included by sharply reducing the voltage command when the current exceeds a certain threshold. The droop term, d k , allows multiple generators to share the load. Voltage regulation utilizes a PI control with anti windup. The output of the controller is the commanded field current into the brushless

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@inproceedings{Bash2011ModelingSA, title={Modeling, Simulation and Experimental Validation of a DC Power System Testbed}, author={Mahaboob Bash and R. R. Chan and Julie Y Crider and C. Harianto and Jianming Lian and Jason C. Neely and Steven D. Pekarek and H V Suryanarayana and Scott D. Sudhoff}, year={2011} }