Modeling CMOS tunneling currents through ultrathin gate oxide due to conduction- and valence-band electron and hole tunneling

@article{Lee2001ModelingCT,
  title={Modeling CMOS tunneling currents through ultrathin gate oxide due to conduction- and valence-band electron and hole tunneling},
  author={Wen-Chin Lee and Chenming Calvin Hu},
  journal={IEEE Transactions on Electron Devices},
  year={2001},
  volume={48},
  pages={1366-1373}
}
A semi-empirical model is proposed to quantify the tunneling currents through ultrathin gate oxides (1-3.6 nm). As a multiplier to a simple analytical model, a correction function is introduced to achieve universal applicability to all different combinations of bias polarities (inversion and accumulation), gate materials (N/sup +/, P/sup +/, Si, SiGe) and tunneling processes. Each coefficient of the correction function is given a physical meaning and determined by empirical fitting. This new… 

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