Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors

  title={Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors},
  author={Steven Wallace and Nader Bagherzadeh},
  journal={IEEE Trans. Parallel Distrib. Syst.},
Instruction fetching is critical to the performance of a superscalar microprocessor We develop a mathematical model for three di erent cache techniques and evaluate its performance both in theory and in simulation using the SPEC suite of benchmarks In all the techniques the fetching performance is dramatically lower than ideal expectations To help remedy the situation we also evaluate its performance using prefetching Nevertheless fetching performance is fundamentally limited by control… CONTINUE READING
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