Model Checking VHDL with CV

  title={Model Checking VHDL with CV},
  author={David D{\'e}harbe and Subash Shankar and Edmund M. Clarke},
This article describes a prototype implementation of a symbolic model checker for a subset of VHDL. The model checker applies a number of techniques to reduce the search space, thus allowing for efficient verification of real circuits. We have completed an initial release of the VHDL model checker and have used it to verify complex circuits, including the control logic of a commercial RISC microprocessor. 

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