Minimizing stand-by leakage power in static CMOS circuits

@inproceedings{Naidu2001MinimizingSL,
  title={Minimizing stand-by leakage power in static CMOS circuits},
  author={Srinath R. Naidu and E. T. A. F. Jacobs},
  booktitle={DATE},
  year={2001}
}
In this paper we concern ourselves with the problem of minimizing leakage power in CMOS circuits consisting of AOI (and-or-invert) gates as they operate in stand-by mode or an idle mode waiting for other circuits to complete their operation. It is known that leakage power due to subthreshold leakage current in transistors in the OFF state is dependent on the input vector applied. Therefore, we try to compute an input vector that can be applied to the circuit in stand-by mode so that the power… CONTINUE READING
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