• Corpus ID: 115787536

Millimeter-Wave Analog to Digital Converters: Technology Challenges and Architectures

  title={Millimeter-Wave Analog to Digital Converters: Technology Challenges and Architectures},
  author={Shahriar Shahramian},
Millimeter-Wave Analog to Digital Converters: Technology Challenges and Architectures Shahriar Shahramian Doctor of Philosophy Graduate Department of Electrical and Computer Engineering University of Toronto 2011 While data converters have been around for nearly nighty years, mm-wave data converters are still in their infancy. Only recently the 40-GHz sampling barrier was broken with the introduction of the next generation high-speed sampling oscilloscopes. Meanwhile, data communication is the… 

Spectral- and Energy-Efficient Hybrid Receivers for Millimeter-Wave Massive Multiuser MIMO Uplink Systems With Variable-Resolution ADCs

This work focuses on a hybrid beamforming architecture consisting of less number of radio-frequency chains with variable-resolution analog-to-digital converters (ADCs) for mmWave massive multiuser MIMO uplink systems, and proposes a simple yet computationally efficient algorithm to design the ADC resolution profile.

Above-90GHz Spectrum and Single-Carrier Waveform as Enablers for Efficient Tbit/s Wireless Communications

The BRAVE project that was launched at early 2018, aims at the elaboration of new waveforms able to efficiently operate in the 90–200 GHz spectrum, with preliminary results on the waveform definition exposed in the present paper.



30-100-GHz inductors and transformers for millimeter-wave (Bi)CMOS integrated circuits

Silicon planar and three-dimensional inductors and transformers were designed and characterized on-wafer up to 100 GHz. Self-resonance frequencies (SRFs) beyond 100 GHz were obtained, demonstrating

Towards a sub-2.5V, 100-Gb/s Serial Transceiver

This paper describes first a half-rate, 2.5-V, 1.4-W, 87-Gb/s transmitter with on-chip PLL fabricated in a production 130-nm SiGe BiCMOS process. Next, the most critical blocks required for the

A 94GHz Locking Hysteresis-Assisted and Tunable CML Static Divider in 65nm SOI CMOS

As an essential clock-system component, millimeter-wave dividers have been implemented for V- and W-band channels. This has also served as a standard benchmark vehicle that reveals high-speed and

An 8-bit, 12 GSample/sec SiGe track-and-hold amplifier

  • Yuan LuW. Kuo B. Heinemann
  • Computer Science
    Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2005.
  • 2005
This circuit is the fastest 8-bit Si-based THA achieved to date and uses a degeneration inductor in the input buffer to improve the performance of the THA.

Low-Voltage Topologies for 40-Gb/s Circuits in Nanoscale CMOS

Experiments show that the transimpedance amplifier based on the CMOS inverter can reach 40-Gb/s operation with a record power consumption of 0.15 mW/Gb/S.

A broadband 10-GHz track-and-hold in Si/SiGe HBT technology

High-performance multistage data converters and sub-sampling frequency downconverters typically require track and hold amplifiers (THAs) with high sampling rates and high linearity. This paper

A 5-b 10-GSample/s a/D converter for 10-gb/s optical receivers

A 5-b flash A/D converter (ADC) is developed in an 0.18-/spl mu/m SiGe BiCMOS that supports sampling rates of 10 Gsample/s. The ADC is optimized to operate in digital equalizers for 10-Gb/s optical

A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology

A 30-GS/sec CMOS track and hold amplifier (THA) designed and fabricated in a 0.13-μm technology shows an input and output return loss of better than -10 dB up to 35 GHz and 7 GHz of bandwidth when the circuit is operated in track mode.

Design methodology for a 40-GSamples/s track and hold amplifier in 0.18-μm SiGe BiCMOS technology

A 40-GSamples/s track and hold amplifier (THA) is designed and fabricated in 0.18-μm SiGe BiCMOS and operates from a 3.6-V supply. The total power consumption is 540 mW with a chip area of 1.1 mm 2 .

A 6-b 12-GSamples/s track-and-hold amplifier in InP DHBT technology

This paper presents a 6-b 12-GSample/s track-and-hold amplifier (THA) fabricated in an InP-InGaAs-InP double heterojunction bipolar transistor (DHBT) technology. The THA is intended for the front end