Low-frequency noise measurements represent an interesting investigation technique for the characterization of the quality and reliability of microelectronic materials and devices. Performing meaningful noise measurements at low and very low (f 1 Hz) frequencies, however, may be quite challenging, particularly because of the many sources of interferences that superimpose to the noise signal. For this reason packaged samples are preferred because they allow accurate shielding from the external environment, and because keeping the sample in close proximity to the low-noise biasing system and amplifier reduces microphonic and electromagnetic disturbances. Notwithstanding this, the possibility of performing low-frequency noise measurements at wafer level would be quite interesting, both because of the ease of obtaining wafer-level samples from industries with respect to packaged samples, and because this would avoid possible packaging-process induced device degradation. The purpose of this work is to demonstrate that it is, in fact, possible to design and build a dedicated probe system for performing high-sensitivity, low-frequency noise measurements on metal–oxide–semiconductor devices at wafer level.