Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages

@article{Chabini2003MethodsFM,
  title={Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages},
  author={Noureddine Chabini and Isma{\"i}l Chabini and El Mostapha Aboulhamid and Yvon Savaria},
  journal={IEEE Trans. on CAD of Integrated Circuits and Systems},
  year={2003},
  volume={22},
  pages={346-351}
}
We address the problem of minimizing dynamic power consumption under performance constraints by scaling down the supply voltage of computational elements off critical paths. We assume that the number of possible supply voltages and their values are known for each computational element. We focus on solving this problem on cyclic and acyclic graphs corresponding to synchronous designs. We consider multiphase clocked sequential circuits derived using software pipelining techniques. In this paper… CONTINUE READING
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References

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Scheduling of Multiple Supply Voltages to Minimize Dynamic Power Consumption in Synchronous Designs

  • N. Chabini, I. Chabini, E.-M. Aboulhamid, Y. Savaria
  • DIRO, Université de Montréal, Tech. Rep. #1214…
  • 2002
1 Excerpt

Fast method for determining an efficient bound on the optimal solution of the cost-to-time ratio problem

  • N. Chabini, E.-M. Aboulhamid, Y. Savaria
  • Proc. 5th World Multiconf. Syst., Cybern. Inform…
  • 2001
2 Excerpts

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