Merged Switch Allocation and Traversal in Network-on-Chip Switches


Large systems-on-chip (SoCs) and chip multiprocessors (CMPs), incorporating tens to hundreds of cores, create a significant integration challenge. Interconnecting a huge amount of architectural modules in an efficient manner, calls for scalable solutions that would offer both high throughput and low-latency communication. The switches are the basic building… (More)
DOI: 10.1109/TC.2012.116


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@article{Dimitrakopoulos2013MergedSA, title={Merged Switch Allocation and Traversal in Network-on-Chip Switches}, author={Giorgos Dimitrakopoulos and Emmanouil Kalligeros and Costas Galanopoulos}, journal={IEEE Transactions on Computers}, year={2013}, volume={62}, pages={2001-2012} }