Memristor-Based Clock Design and Optimization with In-Situ Tunability

Abstract

Process variation is the dominating factor for performance degradation in modern IC chips. The conventional guard-band design methodology leads to significant performance penalty. This paper utilizes an emerging non-volatile resistive device, memristor, with timing violation detectors to dynamically achieve local recovery from timing violation during the… (More)
DOI: 10.1109/ISVLSI.2017.81

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