Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder

Abstract

This paper presents a motion compensation memory hierarchy for an H.264/AVC decoder with support to bi-predictive frames. The designed memory hierarchy reduces the memory bandwidth through the use of a three-dimensional cache and through the use of extra memory saving techniques. The cache size parameters were determined through the evaluation of simulation… (More)
DOI: 10.1109/ISVLSI.2007.64

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@article{Zatt2007MemoryHT, title={Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder}, author={Bruno Zatt and Arnaldo Azevedo and Luciano Volcan Agostini and Altamiro Amadeu Susin and Sergio Bampi}, journal={IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)}, year={2007}, pages={445-446} }