Measuring and Reducing the Performance Gap between Embedded and Soft Multipliers on FPGAs

Abstract

To bridge the gap between FPGAs and ASICs for arithmetic dominated circuits, one key step is to improve multipliers on FPGAs. This is a key feature that FPGA vendors have tried to improve in recent years by embedding ASIC like multipliers in the DSP blocks. However, due to the limited number of DSP blocks in an FPGA, their fixed location and bit-width… (More)
DOI: 10.1109/FPL.2011.48

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@article{ParandehAfshar2011MeasuringAR, title={Measuring and Reducing the Performance Gap between Embedded and Soft Multipliers on FPGAs}, author={Hadi Parandeh-Afshar and Paolo Ienne}, journal={2011 21st International Conference on Field Programmable Logic and Applications}, year={2011}, pages={225-231} }