Measurement and characterization of 6T SRAM cell current

@article{Hsiao2005MeasurementAC,
  title={Measurement and characterization of 6T SRAM cell current},
  author={Ching-Hua Hsiao and Ding-Ming Kwai},
  journal={2005 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'05)},
  year={2005},
  pages={140-145}
}
Despite that there are many works discussing the parameter variations in 6T SRAM bit cells, most of them are based on Monte-Carlo simulations. Basic performance indices, such as cell current, are rarely obtained from measurements. In this paper, we present a simple circuit design to directly measure the cell current. To explore the physical location dependency, the bit cells are selected at the boundary and in the interior of a sub-array, and for each bit cell, the cell currents are measured by… CONTINUE READING
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A bitline leakage compensation scheme for low-voltage SRAMs

  • K. Agawa
  • IEEE J. Solid-State Circuits, vol. 36, no. 5, pp…
  • 2001
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