McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures

@article{Li2009McPATAI,
  title={McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures},
  author={Sheng Li and Jung Ho Ahn and Richard D. Strong and Jay B. Brockman and Dean M. Tullsen and Norman P. Jouppi},
  journal={2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)},
  year={2009},
  pages={469-480}
}
This paper introduces McPAT, an integrated power, area, and timing modeling framework that supports comprehensive design space exploration for multicore and manycore processor configurations ranging from 90nm to 22nm and beyond. At the microarchitectural level, McPAT includes models for the fundamental components of a chip multiprocessor, including in-order and out-of-order processor cores, networks-on-chip, shared caches, integrated memory controllers, and multiple-domain clocking. At the… CONTINUE READING
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