Maximizing reliable performance of advanced CMOS circuits—A case study

Abstract

We consider in detail the aspects of maximizing application performance while maintaining its sufficient reliability on the specific case of serially connected nFETs. Serially connected nFETs used in some digital CMOS applications, such as SRAM decoder circuits, and dynamic logic, are vulnerable to Positive Bias Temperature Instability (PBTI). Here we… (More)

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16 Figures and Tables

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Citations per Year

Citation Velocity: 7

Averaging 7 citations per year over the last 3 years.

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