Managing BGA test socket SI characterization

@article{CheeHoe2013ManagingBT,
  title={Managing BGA test socket SI characterization},
  author={Lin Chee-Hoe and Ng Hui-Ying and Wong Wui-Weng},
  journal={2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013)},
  year={2013},
  pages={589-591}
}
In the area of high speed BGA products, such as APUs and GPUs, new revision of NPI (New Product Introduction) comes rapidly, and frequently involves change in package footprint. Test socket for the BGA package has to be characterized every time it involves a socket pin design change. This paper introduces an effective Signal Integrity (SI) characterization method for BGA test sockets used in high speed system level testing platforms. This method is referred as Coupling Pin Extraction Method… CONTINUE READING
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