MARTE vs. AADL for Discrete-Event and Discrete-Time Domains

  title={MARTE vs. AADL for Discrete-Event and Discrete-Time Domains},
  author={F. Mallet and R. Simone},
Real-time embedded applications tend to combine periodic and aperiodic computations. Modeling standards must then support both discrete-time and discrete-event models of computation and communication whereas they historically pertain to two different communities: asynchronous and synchronous designers. In this article, two emerging standards of the domain (MARTE and AADL) are compared and their ability to tackle this issue is assessed. We plead for combining both standards and show how MARTE… Expand
9 Citations
Models of Architecture for DSP Systems
Logical Time in Model-Driven Engineering
The Time Model of Logical Clocks Available in the OMG MARTE Profile
Schedulability Analysis with CCSL Specifications
Modélisation de plate-forme avionique pour exploration de performance en avance de phase


Dealing with AADL End-to-End Flow Latency with UML MARTE
  • S. Lee, F. Mallet, R. Simone
  • Computer Science
  • 13th IEEE International Conference on Engineering of Complex Computer Systems (iceccs 2008)
  • 2008
Modeling AADL Data Communications with UML MARTE
Modeling time(s)
Clock Constraints in UML/MARTE CCSL
TTCAN: a new time-triggered controller area network
AADL modeling and analysis of hierarchical schedulers
MARTE: Also an UML Profile for Modeling AADL Applications
The synchronous languages 12 years later
Clock constraint specification language: specifying clock constraints with UML/MARTE
  • F. Mallet
  • Computer Science
  • Innovations in Systems and Software Engineering
  • 2008