Low power testing using re-configurable Johnson counter and scalable SIC counter

  • Pallavi Margade
  • Published 2015 in
    2015 International Conference on Communications…

Abstract

This paper deals with a low power approach to generate test pattern for Built In Self Test. Test pattern generated using LFSR has high switching activity and thus a single input change vectors are obtained using reconfigurable Johnson counter and Scalable SIC counter. We proposed a unique low transition multiple single input change sequence used to reduce… (More)

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Cite this paper

@article{Margade2015LowPT, title={Low power testing using re-configurable Johnson counter and scalable SIC counter}, author={Pallavi Margade}, journal={2015 International Conference on Communications and Signal Processing (ICCSP)}, year={2015}, pages={1454-1458} }