Low-power SRAMs power mode control logic: Failure analysis and test solutions


Low-power SRAMs embed power gating mechanisms for reducing static power consumption. Power gating is implemented through power switches for controlling the supply voltage applied to the various memory blocks (array, decoders, I/O logic, etc.). This way, one or more memory blocks can be disconnected from the power supply during a long period of inactivity… (More)
DOI: 10.1109/TEST.2012.6401578


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