Low-latency wireless 3D NoCs via randomized shortcut chips

@article{Matsutani2014LowlatencyW3,
  title={Low-latency wireless 3D NoCs via randomized shortcut chips},
  author={Hiroki Matsutani and Michihiro Koibuchi and Ikki Fujiwara and Takahiro Kagami and Yasuhiro Take and Tadahiro Kuroda and Paul Bogdan and Radu Marculescu and Hideharu Amano},
  journal={2014 Design, Automation & Test in Europe Conference & Exhibition (DATE)},
  year={2014},
  pages={1-6}
}
In this paper, we demonstrate that we can reduce the communication latency significantly by inserting a fraction of randomness into a wireless 3D NoC (where CMOS wireless links are used for vertical inter-chip communication) when considering the physical constraints of the 3D design space. Towards this end, we consider two cases, namely 1) replacing existing horizontal 2D links in a wireless 3D NoC with randomized shortcut NoC links and 2) enabling full connectivity by adding a randomized NoC… CONTINUE READING
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