Low-complexity integrated architecture of 4×4, 4×8, 8×4 and 8×8 inverse integer transforms of VC-1

Abstract

During decoding the bit stream of a block, only a block type selecting from 4×4, 4×8, 8×4 and 8×8 is employed to do the inverse integer transform of VC-1. Accordingly, the hardware architectures of 4×4, 4×8, 8×4 and 8×8 inverse integer transforms can be integrated to reduce hardware cost. In this work, a low-complexity integrated hardware architecture is… (More)

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