Low-Voltage Analog Switch in Deep Submicron CMOS: Design Technique and Experimental Measurements

@article{Fayomi2006LowVoltageAS,
  title={Low-Voltage Analog Switch in Deep Submicron CMOS: Design Technique and Experimental Measurements},
  author={Christian Jes{\'u}s B. Fayomi and Mohamad Sawan and Gordon W. Roberts},
  journal={IEICE Transactions},
  year={2006},
  volume={89-A},
  pages={1076-1087}
}
This paper concerns the design, implementation and subsequent experimental validation of a low-voltage analog CMOS switch based on a gate-bootstrapped method. The main part of the proposed circuit is a new low-voltage and low-stress CMOS clock voltage doubler. Through the use of a dummy switch, the charge injection induced by the bootstrapped switch is greatly reduced resulting in improved sample-and-hold accuracy. An important attribute of the design is that the ON-resistance is nearly… CONTINUE READING

References

Publications referenced by this paper.
Showing 1-10 of 15 references

Bootstrapped low-voltage analog switches

ISCAS • 1999
View 4 Excerpts
Highly Influenced

Design and characterization of low-voltage analog switch without the need for clock boosting

The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. • 2004
View 3 Excerpts
Highly Influenced

Empirical reliability modeling for 0.18-μm MOS devices

Z. Cui, J. J. Liou, Y. Yue, J. Vinson
Solid-State Electronics, vol.47, pp.1515–1522, May 2003. • 2003
View 2 Excerpts

A high-density, matched hexagonal transistor structure in standard CMOS technology for high-speed applications

A. V. Bosch, M.S.J. Steyeart, W. Sansen
IEEE Trans. Semicond. Manuf., vol.13, no.2, pp.167–172, May 2000. • 2000
View 1 Excerpt

A high-speed fully differential current switch

L. Luh, J. Choma, J. Draper
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol.47, no.4, pp.358–363, April 2000. • 2000
View 2 Excerpts

Analog design in deep sub-micron CMOS

Proceedings of the 26th European Solid-State Circuits Conference • 2000
View 1 Excerpt

CMOS switched-op-amp-based sample-and-hold circuit

IEEE Journal of Solid-State Circuits • 2000
View 1 Excerpt

Design of Analog CMOS Integrated Circuit

B. Razavi
2000
View 1 Excerpt

Similar Papers

Loading similar papers…