Low VMIN 20nm embedded SRAM with multi-voltage wordline control based read and write assist techniques

@article{Bhargava2014LowV2,
  title={Low VMIN 20nm embedded SRAM with multi-voltage wordline control based read and write assist techniques},
  author={Mudit Bhargava and Y. K. Chong and Vincent Schuppe and Bikas Maiti and Martin Kinkade and Hsin-Yu Chen and Andy W. Chen and Sanjay Mangal and Jacek Wiatrowski and Gerald Gouya and Abhishek Baradia and Sriram Thyagarajan and Gus Yeung},
  journal={2014 Symposium on VLSI Circuits Digest of Technical Papers},
  year={2014},
  pages={1-2}
}
Measured results of VMIN from 20nm SRAM arrays with read and write assist techniques are presented for multiple flavors of bitcell. A novel assist technique is presented, that provides both read and write assist by controlling only the voltage of wordline (WL) and without using a separate supply voltage. The WL-drivers use a WL float technique to reduce the dc-path current compared to existing WL under-drive read assist designs. The assist technique resulted in a VMIN improvement of 143mV for… CONTINUE READING

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