Low Power Microprocessor Design for Embedded Systems

@inproceedings{Lee2006LowPM,
  title={Low Power Microprocessor Design for Embedded Systems},
  author={Seong-Won Lee and Neungsoo Park and Jean-Luc Gaudiot},
  booktitle={ICCSA},
  year={2006}
}
Continuing advances in VLSI technology render a billion-transistor SOC device inevitable in the near future. However, along with this opportunity the excessive amount of power that billions of transistors will consume will be the most important challenge to the design of the future chips. Many techniques have been developed in order to reduce the power consumption of microprocessors. Unfortunately, this often comes at the expense of performance. In this paper, we describe a number of techniques… 

References

SHOWING 1-10 OF 25 REFERENCES

Power considerations in the design of the Alpha 21264 microprocessor

TLDR
The 21264 is a third generation Alpha microprocessor implementation, containing 15.2 million transistors and operating at 600 MHz, and the electrical design of the power, ground, and clock networks is presented.

A dynamic voltage scaled microprocessor system

A microprocessor system is presented in which the supply voltage and clock frequency can be dynamically varied so that the system can deliver high throughput when required while significantly

Low power methodology and design techniques for processor design

TLDR
IBM's ASIC design methodologies is used to develop a low power microprocessor for the mobile (battery powered) marketplace and some of the innovative power reduction techniques are presented.

Thermal management system for high performance PowerPC/sup TM/ microprocessors

TLDR
The next-generation PowerPC/sup TM/ microprocessor includes a thermal assist unit (TAU) comprised of an on-chip thermal sensor and associated logic and dynamically adjusts processor operation to provide maximum performance under changing environmental conditions.

The design of a high performance low power microprocessor

  • D. Dobberpuhl
  • Computer Science
    Proceedings of 1996 International Symposium on Low Power Electronics and Design
  • 1996
The StrongARM 11O/sup TM/ is the first example of a new generation of very high performance embedded processors. Developed by UK-based ARM Ltd. approximately ten years ago, the ARM microprocessor

SOI for digital CMOS VLSI: design considerations and advances

This paper reviews the recent advances of silicon-on-insulator (SOI) technology for complementary metal-oxide-semiconductor (CMOS) very-large-scale-integration memory and logic applications. Static

Inherently Lower-Power High-Performance Superscalar Architectures

TLDR
This work attempts to bring the power issue to the earliest phases of microprocessor development, in particular, the stage of defining a chip microarchitecture, by investigating power-optimization techniques of superscalar microprocessors at the microarch Architecture level that do not compromise performance.

Energy dissipation in general purpose microprocessors

TLDR
It is found that careful design reduced the energy dissipation by almost 25% and methods of reducing energy consumption that do not lead to performance loss, and methods to reduce delay by exploiting instruction level parallelism are explored.

Clustered Microarchitecture Simultaneous Multithreading

TLDR
This paper proposes a new clustered SMT architecture which is appropriate for both multiple threads and single thread environments and shows that the approach significantly reduces power consumption without significantly degrading performance.

A Single-Chip Multiprocessor

TLDR
Presents the case for billion-transistor processor architectures that will consist of chip multiprocessors (CMPs): multiple (four to 16) simple, fast processors on one chip, and all processors share a larger level-two cache.