Low Noise Low Power CMOS Telescopic-OTA for Bio-Medical Applications

@article{Saidulu2016LowNL,
  title={Low Noise Low Power CMOS Telescopic-OTA for Bio-Medical Applications},
  author={Bellamkonda Saidulu and Arun Manoharan and Kumaravel Sundaram},
  journal={Computers},
  year={2016},
  volume={5},
  pages={25}
}
The preamplifier block is crucial in bio-medical signal processing. The power intensive Operational Transconductance Amplifier (OTA) is considered, and the performance of preamplifier is studied. A low noise and low power telescopic OTA is proposed in this work. To reduce the noise contribution in the active load transistors, source degeneration technique is incorporated in the current stealing branch of the OTA. The OTA design optimization is achieved by gm/Id methodology, which helps to… CONTINUE READING

Citations

Publications citing this paper.
Showing 1-2 of 2 extracted citations

Subthreshold CMOS low-transconductance OTA for powerline interference elimination notch

TENCON 2017 - 2017 IEEE Region 10 Conference • 2017
View 2 Excerpts
Highly Influenced

Subthreshold CMOS low-transconductance OTA based low-pass notch for EEG applications

2017 International Conference on Multimedia, Signal Processing and Communication Technologies (IMPACT) • 2017

References

Publications referenced by this paper.
Showing 1-10 of 26 references

A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS Technology

2011 24th Internatioal Conference on VLSI Design • 2011
View 6 Excerpts
Highly Influenced

low-power low-noise CMOS amplifier for neural recording applications

R. R. Harrison, C. A. Charles
IEEE J. Solid-State Circuits 2003, • 2003
View 7 Excerpts
Highly Influenced

nV/ √ Hz neural recording amplifier with enhanced noise efficiency factor

L. Liu, X. Zou, +3 authors M. Je
Electron. Lett. 2012, • 2012
View 3 Excerpts
Highly Influenced

A fully integrated neural recording amplifier with DC input stabilization

IEEE Transactions on Biomedical Engineering • 2004
View 4 Excerpts
Highly Influenced

Low Voltage Analog CMOS Architectures and Design Methods. Available online: http://scholarsarchive.byu.edu/etd/1218/ (accessed on

K. D. Layton
2016
View 1 Excerpt

Systematic design of analog integrated circuits using ant colony algorithm based on noise optimization

M. Akbari, M. Shokouhifar, O. Hashemipour, A. Jalali, A. Hassanzadeh
Analog Integr. Circuits Signal Process. 2016, • 2016
View 1 Excerpt

An Ultralow-Power Low-Noise CMOS Biopotential Amplifier for Neural Recording

IEEE Transactions on Circuits and Systems II: Express Briefs • 2015
View 3 Excerpts

Design and analysis of folded cascode OTAs using Gm/Id methodology based on flicker noise reduction

M. Akbari, O. Hashemipour
Analog Integr. Circuits Signal Process • 2015
View 3 Excerpts

A $g_{m}/I_{D}$-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier

IEEE Transactions on Circuits and Systems II: Express Briefs • 2014
View 1 Excerpt

Similar Papers

Loading similar papers…