Low Complexity Generic VLSI Architecture Design Methodology for $N^{th}$ Root and $N^{th}$ Power Computations

  title={Low Complexity Generic VLSI Architecture Design Methodology for \$N^\{th\}\$ Root and \$N^\{th\}\$ Power Computations},
  author={Suresh Mopuri and Amit Acharyya},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  • Suresh MopuriA. Acharyya
  • Published 16 September 2019
  • Computer Science
  • IEEE Transactions on Circuits and Systems I: Regular Papers
In this paper, we propose a low complexity architecture design methodology for fixed point root and power computations. The state of the art approaches perform the root and power computations based on the natural logarithm-exponential relation using Hyperbolic COordinate Rotation DIgital Computer (CORDIC). In this paper, any root and power computations have been performed using binary logarithm-binary inverse logarithm relation. The designs are modeled using VHDL for fixed point numbers and… 

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