# Low Complexity Generic VLSI Architecture Design Methodology for $N^{th}$ Root and $N^{th}$ Power Computations

@article{Mopuri2019LowCG, title={Low Complexity Generic VLSI Architecture Design Methodology for \$N^\{th\}\$ Root and \$N^\{th\}\$ Power Computations}, author={Suresh Mopuri and Amit Acharyya}, journal={IEEE Transactions on Circuits and Systems I: Regular Papers}, year={2019}, volume={66}, pages={4673-4686} }

In this paper, we propose a low complexity architecture design methodology for fixed point root and power computations. The state of the art approaches perform the root and power computations based on the natural logarithm-exponential relation using Hyperbolic COordinate Rotation DIgital Computer (CORDIC). In this paper, any root and power computations have been performed using binary logarithm-binary inverse logarithm relation. The designs are modeled using VHDL for fixed point numbers and…

## 4 Citations

### Ultralow-Latency VLSI Architecture Based on a Linear Approximation Method for Computing Nth Roots of Floating-Point Numbers

- Computer ScienceIEEE Transactions on Circuits and Systems I: Regular Papers
- 2021

A methodology for performing root computations on floating-point numbers based on the piecewise linear (PWL) approximation method and determines the widest segments of the subtasks and the smallest fractional width needed to satisfy the predefined maximum relative error.

### Symmetric-Mapping LUT-Based Method and Architecture for Computing XY-Like Functions

- Computer ScienceIEEE Transactions on Circuits and Systems I: Regular Papers
- 2021

A symmetric-mapping lookup table (SM-LUT) to be capable of computing inline-formula functions and an optimized Vedic multiplier to shorten the critical path and improve the efficiency of multiplication are used.

### Low-Complexity and High-Speed Architecture Design Methodology for Complex Square Root

- Computer ScienceCircuits, Systems, and Signal Processing
- 2021

A low-complexity and high-speed VLSI architecture design methodology for complex square root computation using COordinate Rotation DIgital Computer (CORDIC), independent of angle computation in the CORDIC unlike the state-of-the-art methodologies.

### Low-Latency and Minor-Error Architecture for Parallel Computing XY-like Functions with High-Precision Floating-Point Inputs

- Computer ScienceElectronics
- 2021

This paper employs two specific techniques to enlarge the range of convergence of the QH CORDIC, making it possible to deal with high-precision floating-point inputs, and shows that the proposed architecture has 30 more orders of magnitude of maximum relative error and average relative error than the state-of-the-art.

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