Logic Test Pattern Generation Using Linear Codes

  title={Logic Test Pattern Generation Using Linear Codes},
  author={Donald T. Tang and Chin-Long Chen},
  journal={IEEE Transactions on Computers},
Logic testing of today's integrated circuits is a task of increasing difficulty as the number of circuits or transistors packed onto a single chip grows higher and higher. Exhaustive pattern testing, with adequate partitioning of logic, has been explored regarding its potential in solving the problems in test pattern generation and fault coverage. In this paper, we propose a new method of simultaneously generating exhaustive test patterns for all possible input subsets (each corresponding to an… CONTINUE READING

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