Linear scan register allocation

@article{Poletto1999LinearSR,
  title={Linear scan register allocation},
  author={Massimiliano Poletto and Vivek Sarkar},
  journal={ACM Trans. Program. Lang. Syst.},
  year={1999},
  volume={21},
  pages={895-913}
}
We describe a new algorithm for fast global register allocation called linear scan. This algorithm is not based on graph coloring, but allocates registers to variables in a single linear-time scan of the variables' live ranges. The linear scan algorithm is considerably faster than algorithms based on graph coloring, is simple to implement, and results in code that is almost as efficient as that obtained using more complex and time-consuming register allocators based on graph coloring. The… 

Linear Scan Register Allocation in the Context of SSA Form and Register Constraints

This work shows how linear scan register allocation can be applied to register-constrained architectures like the Intel x86 and confirms that linear scan is several times faster than graph coloring for medium-sized to large programs.

Cooperative Instruction Scheduling with Linear Scan Register Allocation

Compared to the default scheduling and graph-coloring allocator schemes found in the IMPACT and Elcor components of Trimaran, the implementation with the pre-pass scheduler and linear scan register allocator significantly reduced compilation times.

Efficient global register allocation

A new register allocation algorithm is described that solves an inability of the similarly motivated Treescan register allocator to look ahead of the instruction being allocated - allowing an unconstrained allocation order, and an ability to better handle fixed registers and loop carried values.

Improvements to Linear Scan register allocation

This paper applies the linear scan register allocation algorithm in a system with SSA form and shows how to improve the algorithm by taking advantage of lifetime holes and memory operands, and also eliminate the need for reserving registers for spill code.

Linear Scan Register Allocation for the Java HotSpot™ Client Compiler

Benchmark results prove that the linear scan algorithm is a good tradeoff if both compilation time and runtime of a program matter: the compilation time is only slightly higher in comparison with the old local heuristic for register allocation, but the resulting code executes about 30% faster.

A Modified Linear Scan Register Allocation Algorithm

  • S. Subha
  • Computer Science
    2009 Sixth International Conference on Information Technology: New Generations
  • 2009
A global register allocation algorithm that makes decisions on register allocation based on the cost of spilling variables in linear scan allocation, which shows an improvement when compared to linear scan algorithm.

Register Allocation with Graph Coloring by Ant Colony Optimization

A new algorithm for intraprocedural register allocation called CA-RT-RA is described, an algorithm that extends a classic graph coloring register allocator to use the authors' graph coloring algorithm Color Ant-RT and is able to minimize the amount of spills.

Optimized interval splitting in a linear scan register allocator

An optimized implementation of the linear scan register allocation algorithm for Sun Microsystems' Java HotSpot™ client compiler is presented, with the high impact of the Intel SSE2 extensions on the speed of numeric Java applications.

SSA-Form-Based Register Allocation for the Java HotSpot

  • Computer Science
  • 2010
Comparing graph coloring and linear scan register allocation on SSA form turns out the two algorithms are not so different than they look at the first glance, so the next research step is to analyze the cases where the two algorithm are equivalent and find cases where they still differ.

Extended Linear Scan: An Alternate Foundation for Global Register Allocation

These results show that Extended Linear Scan is promising as an alternate foundation for global register allocation, compared to Graph Coloring, due to its compile-time scalability without loss of execution time performance.
...

References

SHOWING 1-10 OF 21 REFERENCES

Quality and speed in linear-scan register allocation

This paper implements both register allocators within the Machine SUIF extension of the Stanford SUIF compiler system and describes improvements to the linear-scan approach that allow it to produce code of a quality near to that produced by graph coloring.

Iterated register coalescing

This work shows how to interleave coloring reductions with Briggs's coalescing heuristic, leading to an algorithm that is safe but much more aggressive.

Improvements to graph coloring register allocation

This paper describes two improvements to Chaitin-style graph coloring register allocators, and provides a detailed description of optimistic coloring and rematerialization, and presents experimental data to show the performance of several versions of the register allocator on a suite of FORTRAN programs.

On the Minimization of Loads/Stores in Local Register Allocation

This paper presents an algorithm to find the optimal register allocatbn of stmlght-line programs, and presents a heuristic alguritlrm which generally outper-forms other algorithms In large basic blocks.

A methodology for the real world

Combining Register Allocation and Instruction Scheduling

Preliminary experiments indicate that the (alpha,beta)-Combined Heuristic yields improvements in the range of 16-21% compared to the phase-ordered solutions, when the input graphs contain balanced amount of register pressure and instruction-level parallelism.

An efficient method of computing static single assignment form

This paper presents strong evidence that static single assignment form and the control dependence graph can be of practical use in optimization, and presents a new algorithm that efficiently computes these data structures for arbitrary control flow graph.

A Retargetable C Compiler: Design and Implementation

This new text examines the design and implementation of Icc, a production-quality, retargetable compiler, designed at ATT, and encourages a deeper understanding of programming in C, by providing C programmers with a tour of the language from the perspective of compiler authors.

tcc: a system for fast, flexible, and high-level dynamic code generation

The paper focuses on the techniques that allow tcc to provide 'C's flexibility and expressiveness without sacrificing run-time code generation efficiency, and makes the tcc compiler available in the public domain, the first high-level dynamic compilation system to be made available.