Linear Programming-Based Cell Placement With Symmetry Constraints for Analog IC Layout

@article{Koda2007LinearPC,
  title={Linear Programming-Based Cell Placement With Symmetry Constraints for Analog IC Layout},
  author={Shinichi Koda and Chikaaki Kodama and Kunihiro Fujiyoshi},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year={2007},
  volume={26},
  pages={659-668}
}
In recent high-performance analog integrated circuit design, it is often required to place some cells symmetrically to a horizontal or vertical axis. Balasa et al. proposed a method of obtaining the closest placement that satisfies the given symmetry constraints and the topology constraints imposed by a sequence-pair (seq-pair). However, this method has the following defects: 1) Balasa's necessary condition for existence of the cell placement that satisfies the given constraints is incorrect; 2… CONTINUE READING
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References

Publications referenced by this paper.
Showing 1-10 of 11 references

Symmetry within the sequence-pair representation in the context ofplacement for analog design

IEEE Trans. on CAD of Integrated Circuits and Systems • 2000
View 13 Excerpts
Highly Influenced

On the exploration of the solution space in analog placement with symmetry constraints

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems • 2004
View 3 Excerpts
Highly Influenced

A linear programming-based algorithm for floorplanning in VLSI design

IEEE Trans. on CAD of Integrated Circuits and Systems • 2003
View 1 Excerpt

Fast evaluation of symmetric-feasible sequence-pairs for analog topological placement

K. Krishnamoorthy, S. C. Maruvada, F. Balasa
Proc. 5th IEEE Int. Conf. ASICON, 2003, pp. 71–74. • 2003
View 2 Excerpts

The improved method of L - shaped block packing , ” in

S. C. Maruvada Balasa, K. Krishnamoorthy
Proc . 13 th Workshop Circuits and Syst . Karuizawa • 2000

The improved method of L-shaped block packing

H. Saito, K. Fujiyoshi
Proc. 13th Workshop Circuits and Syst. Karuizawa, 2000, pp. 245–250. (in Japanese). • 2000
View 1 Excerpt

Analog Device-Level Layout Automation

J. Cohn, D. Garrod, R. Rutenbar, L. Carley
Norwell, MA: Kluwer, • 1994
View 1 Excerpt

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