Liberty Queues for EPIC Architectures

  title={Liberty Queues for EPIC Architectures},
  author={Thomas B. Jablin and Yun Zhang and James A. Jablin and Jialu Huang and Hanjun Kim and David I. August},
Core-to-core communication bandwidth is critical for high-performance pipeline-parallel programs. Hardware communication queues are unlikely to be implemented and are perhaps unnecessary. This paper presents Liberty Queues, a high-performance lock-free software-only ring buffer, and describes the porting effort from the original x86-64 implementation to IA-64. Liberty Queues achieve a bandwidth of 500 MB/s between unrelated processors on a first generation Itanium 2, compared with 281 MB/s on… CONTINUE READING
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