Leveraging Silicon-Photonic NoC for Designing Scalable GPUs

@inproceedings{Ziabari2015LeveragingSN,
  title={Leveraging Silicon-Photonic NoC for Designing Scalable GPUs},
  author={Amirkoushyar Ziabari and Jos{\'e} L. Abell{\'a}n and Rafael Ubal and Chao Chen and Ajay Joshi and David R. Kaeli},
  booktitle={ICS},
  year={2015}
}
Silicon-photonic link technology promises to satisfy the growing need for high bandwidth, low-latency and energy-efficient network-on-chip (NoC) architectures. While silicon-photonic NoC designs have been extensively studied for future many-core systems, their use in massively-threaded GPUs has received little attention to date. In this paper, we first analyze an electrical NoC which connects different cache levels (L1 to L2) in a contemporary GPU memory hierarchy. Evaluating workloads from the… CONTINUE READING
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