Leakage Reduction of Power-Gating Sequential Circuits Based on Complementary Pass-Transistor Adiabatic Logic Circuits

@article{Zhang2010LeakageRO,
  title={Leakage Reduction of Power-Gating Sequential Circuits Based on Complementary Pass-Transistor Adiabatic Logic Circuits},
  author={Weiqiang Zhang and Yu Zhang and Shi Xuhua and Jianping Hu},
  journal={2010 International Conference on Innovative Computing and Communication and 2010 Asia-Pacific Conference on Information Technology and Ocean Engineering},
  year={2010},
  pages={282-285}
}
Leakage dissipation is more and more dominant. Limiting leakage power consumption becomes an important factor in IC designs. This paper presents a reduction technique of leakage consumption for adiabatic sequential circuits based on two-phase CPAL (complementary pass-transistor adiabatic logic) using power-gating scheme. A practical sequential circuit with a mode-5X5X5 counter using two-phase CPAL is demonstrated. All circuits are verified using HSPICE, and BSIM4 model is adopted to reflect the… CONTINUE READING