Leading-Zero Anticipator (LZA) in the IBM RISC System/6000 Floating-Point Execution Unit

  title={Leading-Zero Anticipator (LZA) in the IBM RISC System/6000 Floating-Point Execution Unit},
  author={Erdem Hokenek and Robert K. Montoye},
  journal={IBM Journal of Research and Development},
This paper presents a novel technique used in the multiply-add-fused (MAF) unit of the IBM RlSC System/6000* (RS/6000) processor for normalizing the floating-point results. Unlike the conventional procedures applied thus far, the so-called leading-zero anticipator (LZA) of the RS/SOOO carries out processing of the leading zeros and ones in parallel with floating-point addition. Therefore, the new circuitry reduces the total latency of the MAF unit by enabling the normalization and addition to… CONTINUE READING
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Winograd , “ On the Time Required for Binary Addition , ” J . 2 . R . R . Oehler and R . D . Groves , “ IBM RISC System / 6000 ACM 12 , 277 - 285 ( 1965 ) . Processor Architecture , ”

  • E. Hokenek, S. L. Runyon
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