• Economics
  • Published 2002

Lazy Retirement: A Power Aware Register Management Mechanism

@inproceedings{Savransky2002LazyRA,
  title={Lazy Retirement: A Power Aware Register Management Mechanism},
  author={Guillermo Savransky and Ronny Ronen and Antonio Gonz{\'a}lez},
  year={2002}
}
In this paper we describe "Lazy Retirement" a poweraware improvement to the Intel’s P6 family microarchitecture. Lazy Retirement significantly reduces the energy and power involved in register retirement. Lazy Retirement delays the copy from the physical register file (ROB) to the architectural (real) register file (RRF) until it has no choice and the physical register has to be re-used. In many cases, a new retired instruction invalidates such register before it is needed to be copied. Overall… CONTINUE READING

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